In TrendForce’s report on the self-driving System-on-Chip (SoC) market, it has witnessed rapid growth, which is anticipated to soar to $28 billion by 2026, boasting a Compound Annual Growth Rate (CAGR) from 2022 to 2026.

1. Rapid Growth in the Self-Driving SoC Market Becomes a Key Global Opportunity for IC Design Companies

In 2022, the global market for self-driving SoC is approximately $10.8 billion, and it is projected to grow to $12.7 billion in 2023, representing an 18% YoY increase. Fueled by the rising penetration of autonomous driving, the market is expected to reach $28 billion in 2026, with a CAGR of approximately 27% from 2022 to 2026.

Given the slowing growth momentum in the consumer electronics market, self-driving SoC has emerged as a crucial global opportunity for IC design companies.

2. Computing Power Reigns Supreme, with NVIDIA and Qualcomm Leading the Pack

Due to factors such as regulations, technology, costs, and network speed, most automakers currently operate at Level 2 autonomy. In practical terms, computing power exceeding 100 TOPS (INT8) is sufficient. However, as vehicles typically have a lifespan of over 15 years, future upgrades in autonomy levels will rely on Over-The-Air (OTA) updates, necessitating reserved computing power.

Based on the current choices made by automakers, computing power emerges as a primary consideration. Consequently, NVIDIA and Qualcomm are poised to hold a competitive edge. In contrast, Mobileye’s EyeQ Ultra, set to enter mass production in 2025, offers only 176 TOPS, making it susceptible to significant competitive pressure.

3. Software-Hardware Integration, Decoupling, and Openness as Key Competitors

Seamless integration of software and hardware can maximize the computational power of SoCs. Considering the imperative for automakers to reduce costs and enhance efficiency, the degree of integration becomes a pivotal factor in a company’s competitiveness. However, not only does integration matter, but the ability to decouple software and hardware proves even more critical.

Through a high degree of decoupling, automakers can continually update SoC functionality via Over-The-Air (OTA) updates. The openness of the software ecosystem assists automakers in establishing differentiation, serving as a competitive imperative that IC design firms cannot overlook.

As reported by Jiwei, Beijing Xuanjie Technology Co., Ltd. has recently been established, and its legal representative is Xuezhong Zeng, who holds the position of Senior Vice President at Xiaomi Corporation. The company has registered capital amounting to 3 billion Yuan and is involved in activities related to IC design services and product sales, among other areas.

This marks the second “Xuanjie Technology” venture within the Xiaomi family. Back in December 2021, Shanghai Xuanjie Technology Co., Ltd. was established, also under the legal representation of Zeng. The company’s scope of operations encompasses technological services in the semiconductor field, integration of information systems, IC design and service related, and product sales. All of these are fully owned by X-Ring Limited.

Xiaomi, alongside OPPO and VIVO, among other Chinese smartphone brands, often find it challenging to independently develop advanced system on a chip (SoC) due to constraints in technical expertise and financial resources. Consequently, their primary focus on developing specialized chips like power management integrated circuits (PMICs) and Image Signal Processor (ISP), based on their collective experience in chip development.

Xiaomi stands out as the sole Chinese brand among these peers, having successfully launched its self-developed SoC in 2017, known as the “Surge S1,” which was integrated into the mid-range Xiaomi 5C. Nevertheless, the Xiaomi 5C fell short of expectations, mainly due to the absence of distinguishing features in the “Surge S1.” Many reviews highlighted subpar real-world performance of Xiaomi phones equipped with the S1 chip.

Subsequently, Xiaomi did not introduce a successor chip. In 2021, they introduced the ISP chip “Surge C1” and the charging chip “Surge P1.” In 2022, they rolled out the PMIC G1, emphasizing its significant potential in enhancing battery health, accurate battery life predictions, and overall smartphone battery performance.

Xiaomi’s President, Weibing Lu, has previously reaffirmed the company’s unwavering commitment to developing in-house chips. They fully acknowledge the long-term and intricate nature of chip development, respect the established development patterns in the industry, and remain prepared for a long-term strategy, all with the ultimate goal of enhancing the competitiveness and user experience of their end products.
(Image: Xiaomi)

Semiconductor process technology is nearing the boundaries of known physics. In order to continually enhance processor performance, the integration of small chips (chiplets) and heterogeneous Integration has become a prevailing trend. It is also regarded as a primary solution for extending Moore’s Law. Major industry players such as TSMC, Intel, Samsung, and others are vigorously developing these related technologies.

What are SoC, SiP, and Chiplet?

To understand Chiplet technology, we must first clarify two commonly used terms: SoC and SiP. SoC (System on Chip) involves redesigning multiple different chips to utilize the same manufacturing process and integrating them onto a single chip. On the other hand, SiP (System in Package) connects multiple chips with different manufacturing processes using heterogeneous integration techniques and integrates them within a single packaging form.

Chiplet technology employs advanced packaging techniques to create a SiP composed of multiple small chips. It integrates small chips with different functions onto a single substrate through advanced packaging techniques. While Chiplets and SiPs may seem similar, Chiplets are essentially chips themselves, whereas SiP refers to the packaging form. They have differences in functionality and purpose.

Chiplets: Today’s Semiconductor Development Trend

The design concept of Chiplet technology offers several advantages over SoC, notably in significantly improving chip manufacturing yield. As chip sizes increase to enhance performance, chip yield decreases due to the larger surface area. Chiplet technology can integrate various smaller chips with relatively high manufacturing yields, thus enhancing chip performance and yield.

Furthermore, Chiplet technology contributes to reduced design complexity and costs. Through heterogeneous integration, Chiplets can combine various types of small chips, reducing integration challenges in the initial design phase and facilitating design and testing. Additionally, since different Chiplets can be independently optimized, the final integrated product often achieves better overall performance.

Chiplets have the potential to lower wafer manufacturing costs. Apart from CPUs and GPUs, other units within chips can perform well without relying on advanced processes. Chiplets enable different functional small chips to use the most suitable manufacturing process, contributing to cost reduction.

With the evolution of semiconductor processes, chip design has become more challenging and complex, leading to rising design costs. In this context, Chiplet technology, which simplifies design and manufacturing processes, effectively enhances chip performance, and extends Moore’s Law, holds significant promise.

Applications and Development of Chiplets

In recent years, global semiconductor giants like AMD, TSMC, Intel, NVIDIA, and others have recognized the market potential in this field, intensively investing in Chiplet technology. For example, AMD’s recent products have benefited from the ‘SiP + Chiplet’ manufacturing approach. Moreover, Apple’s M1 Ultra chip achieved high performance through a customed UltraFusion packaging architecture. In academia, institutions like the University of California, Georgia Tech, and European research organizations have begun researching interconnect interfaces, packaging, and applications related to Chiplet technology.

In conclusion, due to Chiplet technology’s ability to lower design costs, reduce development time, enhance design flexibility and yield, while expanding chip functionality, it is an indispensable solution in the ongoing development of high-performance chips.

This article is from TechNews, a collaborative media partner of TrendForce.

Recently, there has been news of collaboration between NVIDIA and MediaTek. Speculation suggests that the future collaboration may extend to smartphone SoCs, allowing MediaTek to enhance the graphical computing and AI performance of Dimensity smartphone SoCs through NVIDIA’s GPU technology licensing.

Currently, the focus of this collaboration is primarily on NB SoC development, with some progress in the automotive-related chip sector. As for the scope of smartphone SoC collaboration, it is still under discussion, but the potential for related partnerships is worth noting.

In the announced collaboration between NVIDIA and MediaTek for the NB SoC products, MediaTek is mainly responsible for CPU, while other part such as GPU, DSP, ISP, and interface IP are provided by NVIDIA or external partners. NVIDIA holds the leadership position, while MediaTek plays a supporting role in this collaboration.

Regarding the industry’s speculation about possible collaboration in smartphone SoC development, it is estimated that MediaTek will take the lead in the design. Therefore, it is necessary to explore the motivations behind MediaTek’s adoption of related technologies.

Firstly, since the era of the Arm V9 instruction set, Arm’s reference GPU, Immortalis, has incorporated ray tracing functionality, assisting MediaTek’s flagship SoCs in improving gaming performance. This indicates that optimizing gaming scenarios is a key development focus for SoC manufacturers.

However, for high-end gaming applications, the current GPU performance of smartphone SoCs still cannot maintain high frame rates and native resolutions during gameplay. While selecting a pure core stacking approach to improve computational power is effective, it puts pressure on device power consumption. In light of this, Qualcomm introduced Snapdragon Game Super Resolution (GSR) technology this year, which simultaneously reduces power consumption and enhances game graphics quality. MediaTek has not yet explored this technology, and Arm Immortalis has not been released. Therefore, when it comes to GPU performance computing, MediaTek has incentives to seek external collaborations.

Furthermore, with the rapid upgrading of GPUs on smartphone SoCs, PC-level games are now being introduced to smartphones, and industry players are promoting compatibility with graphics APIs, opening doors for NVIDIA, AMD, and even Intel to enter the mobile gaming market. Samsung has partnered with AMD for its Exynos SoC GPU, while NVIDIA, with similar technology to Qualcomm Snapdragon GSR, becomes a logical choice as a cooperation partner for MediaTek.

TrendForce believes that if MediaTek integrates NVIDIA GPUs into Dimensity SoCs and leverages TSMC’s process power efficiency advantages, it could bring a new wave of excitement to MediaTek in the flagship or gaming device market, attracting consumer interest. However, despite the potential technical benefits of collaboration, considering the influence of geopolitical factors, MediaTek, which primarily sells its smartphone SoCs to Chinese customers, may ultimately abandon this collaboration option due to related policy risks.

The excitement surrounding ChatGPT has sparked a new era in generative AI. This fresh technological whirlwind is revolutionizing everything, from cloud-based AI servers all the way down to edge-computing in smartphones.

Given that generative AI has enormous potential to foster new applications and boost user productivity, smartphones have unsurprisingly become a crucial vehicle for AI tech. Even though the computational power of an end device isn’t on par with the cloud, it has the double benefit of reducing the overall cost of computation and protecting user privacy. This is primarily why smartphone OEMs started using AI chips to explore and implement new features a few years ago.

However, Oppo’s recent decision to shut down its chip design company, Zheku, casted some doubts on the future of smartphone OEMs’ self-developed chips, bringing the smartphone AI chip market into focus.

Pressing Needs to Speed Up AI Chips Iterations

The industry’s current approach to running generative AI models on end devices involves two-pronged approaches: software efforts focus on reducing the size of the models to lessen the burden and energy consumption of chips, while the hardware side is all about increasing computational power and optimizing energy use through process shrinkage and architectural upgrades.

IC design houses, like Qualcomm with its Snapdragon8 Gen.2, are now hurrying to develop SoC products that are capable of running these generative AI base models.
Here’s the tricky part though: models are constantly evolving at a pace far exceeding the SoC development cycle – with updates like GPT occurring every six months. This gap between hardware iterations and new AI model advancements might only get wider, making the rapid expansion of computational requirements the major pain point that hardware solution providers need to address.

Top-tier OEMs pioneering Add-on AI Accelerators

It’s clear that in this race for AI computational power, the past reliance on SoCs is being challenged. Top-tier smartphone OEMs are no longer merely depending on standard products from SoC suppliers. Instead, they’re aggressively adopting AI accelerator chips to fill the computational gap.

The approaches of integrating and add-on AI accelerator were first seen in 2017:

• Integrated: This strategy is represented by Huawei’s Kirin970 and Apple’s A11 Bionic, which incorporated an AI engine within SoC.
• Add-on: Initially implemented by Google Pixel 2, which used a custom Pixel Visual Core chip alongside Snapdragon 835. It wasn’t until the 2021 Pixel 6 series, which introduced Google’s self-developed Tensor SoC, that the acceleration unit was directly integrated into the Tensor.

Clearly, OEMs with self-developing SoC+ capabilities usually embed their models into AI accelerators at the design stage. This hardware-software synergy supplies the required computing power for specific AI scenarios.

New Strategic Models on the Rise

For OEMs without self-development capabilities, the hefty cost of SoC development keeps them reliant on chip manufacturers’ SoC iterations. Yet, they’re also applying new strategies within the supply chain to keep pace with swift changes.

Here’s the interesting part – brands are leveraging simpler specialized chips to boost AI-enabled applications, making standalone ICs like ISPs(Image Signal Processors) pivotal for new features of photography and display. Meanwhile, we’re also seeing potential advancements in the field of productivity tools – from voice assistants to photo editing – where the implementation of small-scale ASICs is seriously being considered to fulfill computational demands.

From Xiaomi’s collaboration with Altek and Vivo’s joint effort with Novatek to develop ISPs, the future looks bright for ASIC development, opening up opportunities for small-scale IC design and IP service providers.

Responding to the trend, SoC leader MediaTek is embracing an open 5G architecture strategy for market expansion through licensing and custom services. However, there’s speculation about OEMs possibly replacing MediaTek’s standard IP with self-developed ones for deeper product differentiation.

Looking at this, it’s clear that the battle of AI chips continues with no winning strategy for speeding up smartphone AI chip product iteration.

Considering the substantial resources required for chip development and the saturation of the smartphone market, maintaining chip-related strategies adds a layer of uncertainty for OEMs.With Oppo’s move to discontinue its chip R&D, other brands like Vivo and Xiaomi are likely reconsidering their game plans. The future, therefore, warrants close watch.

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